Position: PhD Student
Current Institution: University of Illinois at Urbana-Champaign
Abstract: Secure Cache Hierarchies
In today’s hyper-digitalized world, security and privacy have become primary concerns. Sensitive information must be processed in a trustworthy way on various computation platforms, ranging from mobile devices to public clouds. Unfortunately, state-of-the-art hardware technology today is vulnerable to sophisticated attacks. In fact, several key performance features of modern processors have demonstrated vulnerabilities to security attacks like the recent Meltdown and Spectre attacks. Hardware exploitations break the assumptions underpinning numerous software security mechanisms, and thus represent serious threats to current systems. My research focuses on an important class of security threats cache-based covert side channel attacks. In these types of attacks, an attacker is able to stealthily leak sensitive information from a system without violating existing security policies enforced by the software layer. These attacks have been gaining popularity and currently exist for major vendor processors. My research makes contributions in two directions: designing new attacks and proposing new architectural defense techniques. First, I worked on designing new types of attacks targeting emerging applications and architectures to help the community to identify unexploited security vulnerabilities. For example, modern cache hierarchy designs are moving away from inclusive caches. Non-inclusive caches provide an illusion to researchers that they are resistant to cache attacks. However, I have demonstrated the first cross-core Prime+Probe attacks on state-of-the-art non-inclusive sliced caches showing that cache attacks are still a large security problem. Second, I worked on designing practical detection and defense mechanisms to combat cache-based side channels by leveraging architecture innovations which attain much better trade-offs between performance effectiveness and implementation complexity. I designed “ReplayConfusion,” an efficient detection methodology against cache-based covert channel attacks. I also proposed ‘SHARP’, a new secure hierarchy-aware cache replacement policy to effectively defend against cross-core cache-based side channel attacks.
Mengjia is a PhD student at UIUC, advised by Professor Josep Torrellas. She received a master’s degree from UIUC in 2016 and a bachelor’s degree from Zhejiang University in 2013. She was selected as Mavis Future Faculty Fellow in 2018, and she received W.J. Poppelbaum Memorial Award and an ACM SIGARCH Student Scholarships for Celebration of 50 Years of the ACM Turing Award in 2017.